Di Wu
ECE Department
University of Toronto
10 King's College Road
Toronto, ON, M5S 3G4
Office:   EA 306 - 11
Email: peterwudi DOT wu AT utoronto DOT ca
Last updated: Sept 30, 2014


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Welcome to my website!

I received my Bachelor of Applied Science (B.A.Sc.) degree with honors in the ECE department from the University of Toronto in June 2012. After graduation, I stayed in the department and start to pursue my Master of Applied Science (M.A.Sc) degree under supervision of Prof. Andreas Moshovos, and I received my M.A.Sc. degree in September 2014.

My research interests include computer architecture and FPGA-based application accelerators. I've devoted most of my time on the following two researches:


High performance branch predictors for soft processors

Branch prediction has been extensively studied, mostly in the context of application specific custom logic (ASIC) implementations. However, naively porting ASIC-based branch predictors to FPGAs results in slow and/or resource-inefficient implementations as the tradeoffs are different for reconfigurable compared to custom logic. This research proposes FPGA-specific modifications that improve accuracy, resource cost, or both.

Image Signal Processors on FPGAs

An Image Signal Processor (ISP) converts raw imaging sensor data into a format appropriate for further processing and human inspection. The ISP operations are often computation bound, especially when processing high-resolution high-frame rate videos. This research attempts to answer the following question: why are ISP operations slow, and if we were to build an architecture to accelerate these operations, what would the architecture look like.


For more details about my research, please click here to check out my publications.