|Luke Wang |
Department of Electrical and Computer Engineering
University of Toronto
40 St.George Street
Toronto, ON M5S 2E4
A full CV can be found here.
Analog circuit design for wireline communication and adaptive digital signal processing. Awards
Analog circuit design for wireline communication and adaptive digital signal processing.
AwardsNSERC Postgraduate Scholarship (PGS D) (2015-2018) Ontario Graduate Scholarship (2014-2015) Queen Elizabeth II/ISS '97 Scholarship in Science and Technology (2012-2013) NSERC Alexander Graham Bell Canada Graduate Scholarship (CGS M) (2011-2012) University of Waterloo President's Research Award (2009) University of Waterloo President's Scholarship (2006) University of Waterloo Nortel Networks Award (2006) University of Waterloo Dean's Honours List (2006-2011)
PublicationsL. Wang and A.Yasotharan, "FPGA-based QR decomposition signal processor for GPS anti-jamming array antenna", Tech. Memo TM 2009-025, DRDC Ottawa, Nov. 2009. L. Wang, Q. Wang, A. Chan Carusone, "Time Interleaved C-2C SAR ADC with Background Timing Skew Calibration in 65nm CMOS", ESSCIRC, Sept. 2014.