Project Title: LIT PV solar cells
Project Leader: Zahidur R Chowdhury
Supervisor: Prof. Nazir P. Kherani
My role: Device fabrication, cell performance measurement, analysis of the cell performance, report writing.
Tools used: Oxford PlasmaLab 100 PECVD System / DC Saddle Field PECVD Deposition System / Karl Suss Mask Aligner MA 6 / e-beam Metal Deposition and sputtering System / Sinton Silicon Lifetime Tester / Semilab’s µ-PCD lifetime tester / MATLAB / LATEX / Microsoft Office / Origin
Summary
- A novel cell concept is proposed that uses the recently reported high quality facile native oxide based passivation scheme for crystalline silicon surfaces. Maximum cell efficiency of 13.6% has been achieved for the proof-of-concept Lateral Inherently Thin (LIT) cell using double side polished crystalline silicon wafers. More details will be published soon.
Publication(s)
N P Kherani and Z R Chowdhury, “Passivation of Silicon Surfaces Using Intermediate Ultra-thin Silicon Oxide and Outer Silicon-based Dielectric Layer”, US Patent Application No. 13/829,206, Priority date: 11 May 2012. link
Zahidur R. Chowdhury and Nazir P Kherani, “Laterally Inherently Thin (LIT) Amorphous-Crystalline Silicon Heterojunction Photovoltaic Cell”, Progress in Photovoltaic Research and Application. [Submitted]