Dustin Dunwell

Conference Proceedings

M. Bichan, D. Dunwell, Q. Wang and A. Chan Carusone, "A Passive Resonant Clocking Network for Distribution of a 2.5-GHz Clock in a Flash ADC," IEEE International Symposium on Circuits and Systems (ISCAS), May 2014.
D. Dunwell, A. Chan Carusone, J. Zerbe, B. Leibowitz, B. Daly and J. Eble, "A 2.3-4GHz Injection-Locked Clock Multiplier with 55.7% Lock Range and 10-ns Power-On," IEEE Custom Integrated Circuits Conference (CICC), September 2012.
J. Zerbe, B. Daly, W. Dettloff, T. Stone, W. Stonecypher, P. Venkatesan, K. Prabhu, B. Su, J. Ren, B. Tsang, B. Leibowitz, D. Dunwell, A. Chan Carusone and J. Eble, "A 5.6 Gb/s 2.4 mW/Gb/s Bidirectional Link with 8 ns Power-On," IEEE Symposium on VLSI Circuits, June 2011, pp 82-83.
D. Dunwell and A. Chan Carusone, "Gain and Equalization Adaptation to Optimize the Vertical Eye Opening in a Wireline Receiver," IEEE Custom Integrated Circuits Conference (CICC), Sep 2010.
D. Dunwell and A. Chan Carusone, "A 15-Gb/s Preamplifier with 10-dB Gain Control and 8-mV Sensitivity in 65-nm CMOS," IEEE International Symposium on Circuits and Systems (ISCAS), May 2010, pp 205-208.
D. Dunwell and B. Frank, "Accumulation-Mode MOS Varactors for RF CMOS Low-Noise Amplifiers," IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Jan 2007, pp. 145-148.
D. Dunwell and B. Frank, "24 GHz Low-Noise Amplifiers Using High Q Series-Stub Transmission Lines in 0.18-um CMOS," IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), May 2006, pp. 1918-1921.
B. Laska, D. Dunwell, F. Chan and H. Jafarkhani, "Computer Design of Super-Orthogonal Space-Time Trellis Codes," IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), May 2004, pp. 2179-2184.

Refereed Jounrals

S. Chen, L. Wang, Y. Wang, D. Dunwell, R. Murugesu and A. Chan Carusone, "All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters," Submitted for publication in IEEE Trans. on Very Large Scale Integration Systems (TVLSI), December 2016.
D. Dunwell and A. Chan Carusone, "Modeling Oscillator Injection Locking Using the Phase Domain Response," IEEE Trans. on Circuits and Systems - I (TCAS-I), vol. 60, no. 11, pp. 2823-2833, November 2013.
M. Bale, B. Laska, D. Dunwell, F. Chan and H. Jafarkhani, "Computer Design of Super-Orthogonal Space-Time Trellis Codes," IEEE Trans. on Wireless Communications, vol. 6, February 2007, pp. 463-467.

Patents

J. Zerbe, B. Daly, D. Dunwell, A. Chan Carusone, J. Eble, "Integrated Circuit Having a Multiplying Injection-Locked Oscillator," US Patent number WO2012151050 A2, Nov. 2012.

M. Sc. Thesis

D. Dunwell, K-Band Low-Noise Amplifier Design in CMOS Technology, September 2006.

Ph. D. Thesis

D. Dunwell, Adaptive Receivers for High-Speed Wireline Links, September 2012.

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